2012 Top Innovators in EDA: Serial innovation, collaboration, and patience
One of the first observations I had when reviewing our 2012 Top Innovators in EDA was that there are a number of individuals who are “serial innovators,” having contributed to several of the most significant developments in EDA over a period of many years. While an innovation may most often be thought of as a new idea, I hope you will agree that the true measure of an innovation is the impact it has on changing how things are done. That takes time, and innovators who have done that more than once stood out in the group of nominees.
Dr. John Sanguinetti –
Forte Design Systems
Dr. John Sanguinetti is a serial entrepreneur as well as a serial innovator. As a founder and Chief Technology Officer of Forte Design Systems, which he began with two other engineers as CynApps in 1998, he has been a pioneer in the development of higher level digital synthesis. The company’s Cynthesizer product generates Register-Transfer Level (RTL) design descriptions directly from a high-level SystemC input.
Prior to Forte, in 1991, Dr. Sanguinetti was the founder of Chronologic Simulation, which revolutionized logic simulation with the development of the first compiled code simulator. The Verilog Compiler Simulator, perhaps better known as VCS, is now a foundational piece of Synopsys’ digital design flow. In 1994, Chronologic was acquired by ViewLogic, which was later acquired by Synopsys. In 2011, Dr. Sanguinetti was elected as a 2011 ACM Fellow for his contributions to hardware simulation.
Looking at the needs for further innovation in High-Level Synthesis (HLS), Sanguinetti says “it is clear that design has to be done at a higher level of abstraction.” The only alternative is using more predesigned IP blocks. The downside of that, he says, is that you can’t introduce new functionality. He continued that adoption of HLS is increasing, but more slowly than the industry needs due to the learning curve for such a paradigm shift. To remedy that curve he sees a need for better educational materials and methods.
Most EDA companies have a goal of being acquired by one of the larger EDA companies, usually by the time they achieve ten years or so in business. Since Forte is approaching fifteen years since startup, I asked Dr. Sanguinetti how his company has been able to continue operating independently for so long while remaining a pioneer in the field.
Dr. Sanguinetti says that initially his expectation was for an exit, either by being acquired or through merger with smaller companies in the space to create a new EDA player. He said that though Forte has done two acquisitions and a merger, the company has not reached the scale he originally had in mind, but due to the patience of investors and the commitment of early customers, he believes that Forte has benefitted by maintaining focus on a single product.
Dr. Chi-Ping Hsu –
Cadence Design Systems
Dr. Chi-Ping Hsu is currently the Senior Vice President of Research and Development for the Silicon Realization Group at Cadence Design Systems. Silicon Realization has been referred to as “EDA Classic,” as it includes all of the well-established tools for design, verification, and implementation, and Dr. Hsu has been instrumental in constructing that segment of Cadence’s drive toward end-to-end deterministic flows. In their nomination, Cadence noted that Dr. Hsu has “helped grow the company’s logic synthesis segment tenfold,” and he is also the founder of the industry’s first coalition for standardization of advanced low-power design, the Power Forward Initiative.
Dr. Hsu’s EDA career began in logic emulation at PiE Design Systems, and eventually landed Dr. Hsu at Avant!, where he was responsible for product and technology development for physical synthesis tools that later became key components of Synopsys’ portfolio. In 2001, Dr. Hsu joined startup Get2Chip, eventually assuming the roles of President and COO. Get2Chip developed further innovations in logic synthesis, and was acquired by Cadence in 2003. His leadership in digital implementation has contributed greatly to the success of EDA’s two largest companies, and as he has been involved in developing some of the major foundational innovations of the industry, I asked him for his perspective on innovations that will be required at 20 nm and below.
Dr. Hsu reflected back on the beginnings of his career, which roughly coincided with the beginnings of the EDA industry. He said that while the industry has been able to improve design productivity 30 to 50 times over the last 20 years, that is still insufficient to close a “design gap” that is constantly being moved forward by Moore’s Law. The challenges in the next three to five years are generally well known, he said, but the difficulty is how to find solutions.
To develop such innovations requires leveraging a base of established technology, the core of the “solved problems” in EDA. Hsu asserts that startup entrepreneurs and established EDA leaders must collaborate in a symbiotic relationship that drives innovation. He describes a typical innovation timeline as requiring three years to build a prototype, followed by two more years to take the prototype to production readiness, and an additional two years to educate the market on the new innovation, totaling a minimum of seven years of development for the most successful innovations. Dr. Hsu said that as one of the largest EDA suppliers, Cadence Design Systems has a responsibility to nurture the advancement of technology by working with innovative entrepreneurs to provide a base of technology that they can work from. He points to open standards for interoperability, such as OpenAccess, as being critical to the development of future innovations.
The Calibre development team – Mentor Graphics
The Calibre suite of tools has been the market leader for many years in the Design For Manufacturing (DFM) and physical verification segment of the EDA industry. Behind those tools is Mentor Graphics’ core Calibre development team composed of Chief Technologists Laurence Grodd and Kobi Kresh and Chief Scientist Robert Todd.
Though we had originally expected nominations for individuals, it makes complete sense to acknowledge a team effort, as few, if any, EDA tools are developed by one individual. In their nomination, Mentor attributed the initial 20 to 30 percent speedup over competitor’s tools in Calibre to an innovation that allowed checking operations to be performed in parallel. This was followed by the introduction of hierarchical processing in 1996, which Mentor says achieved a five to ten times speed improvement. Mentor also cited a long series of innovations since then, culminating in a total of 48 patents that have been granted to the Calibre core team.
Rather than reiterate each of those innovations, I asked Calibre team member Laurence Grodd what he sees as the biggest challenges at 20 nm and below. He listed the huge data volume, with billions of fill shapes that are now mainstream in Design Rule Checking (DRC). He said that 100-plus CPU configurations are now considered normal, and the thread-management tasks are extremely difficult.
Robert Todd commented on the team aspect of Calibre innovations, saying that (like most engineers), the individuals are all highly motivated and opinionated. He said that “provides a lot of fertile soil for both new ideas and conflict or chaos. I don’t think you can have one without the other.” The message is that the team is able to resolve inevitable conflicts that occur, without letting them detract from the ongoing stream of innovation.
Progressing the state of the art
Selecting just three “Top EDA Innovators” was very difficult. That’s very good news for EDA, since we found innovators across the entire breadth of the industry. You can find a complete list of nominees and more information about them at edadigest.com. We congratulate all of our nominees on their achievements, and look forward to continuing to follow developments that advance the state of the art in electronics design.