Adding intellect to intelligent systems

The increase in the complexity and density of embedded products has created a large market for off-the-shelf, ready-to-use circuit elements that designers can easily incorporate into their products without the development and debug efforts normally associated with new projects. These functional circuit elements, commonly referred to as Intellectual Property (IP) cores, are described by Hardware Description Language (HDL) code and allow manufacturers to reuse circuit elements from previous designs or simply purchase functionality from an outside source.

Specific examples of IP cores include UARTs, DSPs, Ethernet interfaces, bus interfaces, and even microcontrollers. IP cores are widely available from commercial vendors, third-party suppliers, or the open-source community. IP cores are usually fee-based and include documentation, verification tools, and support.

In this issue of we take a look at IP cores from the embedded perspective, along with development advantages and expected trends. In the Strategies section, Allan Chin, CEO of Stellamar, presents a detailed technical article that aims to deepen designers’ understanding of analog IP cores for embedded computing projects. Recognizing that the analog portion of embedded designs can be a bottleneck, Allan outlines the current commercial marketplace and offers suggestions for evaluating and selecting analog IP.

Another important aspect of every embedded design is memory architecture selection. Designers must evaluate system components based on bandwidth, performance, long-term availability, and data protection. To start the conversation in the Silicon section, Josh Lee, CEO and president of Uniquify, reveals the changes that designers can expect as the new Double Data Rate type four Synchronous Dynamic Random-Access Memory (DDR4 SDRAM) specification becomes widely available in the near future. Given the higher data rates and lower voltage levels for DDR applications, Jitesh Shah, Principal Engineer at Integrated Device Technology, presents the technical advantages for changing the chip-to-package interconnect method from wirebond to flip chip. Finally, Phan Hoang, VP of R&D at Virtium Technology, discusses the requirements necessary for memory solutions that must operate in rugged, high-shock and -vibration conditions for extended life cycles.

As designers have endeavored to shorten development schedules, reduce recurring costs, and combine multiple systems, has become one of the hottest buzzwords in the embedded environment. With a recent boost from the widespread abundance of processors, platforms allow design teams to combine high-level (OSs) with real-time, deterministic software without performance penalties. For example, in our Software section, Chris Grujon, marketing director for TenAsys Corporation, explains the benefits of a Real-Time OS () working alongside a General-Purpose OS (GPOS) such as Microsoft Windows in a virtual setting. In this same section, I cover some of the history and overall benefits of virtualization and highlight a few examples of commercial products designed to enhance and consolidate embedded workloads.

The technical articles in this issue delve into some of the hardware and software development details related to a wide range of embedded projects including IP, state-of-the-art memory products, and virtualization. Our job here at Embedded Computing Design is to bring you the latest trends and technology updates to keep you ahead of the competition. Please give us your ideas on print articles and online updates that we can provide to support your design efforts. If you have a suggestion for a technical article or video that would be of interest to you or other designers, please let me know.