Floating-point support is delivered as a set of Nios II custom instructions. Custom instructions off-load software operations into hardware and provide an extremely flexible option for increasing CPU performance. When selected by the user, the prebuilt floating-point custom instructions are added into the CPU data path automatically, and all subsequent floating-point operations are evaluated using the dedicated hardware. Fully supported within the software-programming tool chain, floating-point custom instructions offer a completely transparent programming model to the designer.

Newest Offering Builds Altera’s Proven PCI Express Product Portfolio

Stratix II GX FPGAs are built using the "adaptive logic module" (ALM), Altera’s patented six-input LUT architecture introduced in 2004 with the announcement of Stratix II FPGAs. Stratix II GX FPGAs are the industry’s only 90-nm FPGAs providing transceiver speeds up to 6.375 Gbps on every channel. All members of the Stratix II GX family are planned to be in full production by the fourth quarter of 2006.

Altera FPGAs Help Broadcast Equipment Leader Design Tape-Free Cameras With Field-Upgradeable Functions

FPGA-Based Upconverter Provides Breakthrough Image and Display Quality; Audio Sample Rate Converter IP Enables Design Flexibility

A Pro-MPEG code of practice #3 forward error correction (FEC) module is now available for use with Altera’s Video over IP reference design. Optimized for Altera® Cyclone(TM) II and Stratix® II FPGAs, the module adds error correction for recovery of missing packets, deduplication and packet reordering, and eliminates network-induced errors and their resulting video artifacts. Altera successfully tested the interoperability of this new reference design module with the T-VIPS TVG420 ASI to IP Video Gateway.

Altera Also Provides Third-Party Access to Underlying System-Level Infrastructure

The Stratix II GX signal integrity development kit is the ideal platform for evaluating and validating the signal integrity features of the 6.375-Gbps transceivers. This development kit provides everything necessary for the validation of high-speed backplane interface, chip-to-chip and communications protocol-bridging applications. It includes configuration options, flexible clocking options and a USB port to interface with a PC for easy plug-and-play. The kit, available for $1,295, also includes Quartus® II design software, an AC adaptor power supply, a USB-BlasterTM download cable, two SMA-compatible cables, reference designs and documentation. For more information about the kit, visit the ’source’ link at the bottom of this story.

Altera Solution Will Help Shorten Development Time, Reduce Power and Lower Costs for Revolutionary JTRS Cluster 5 Radios

Partnership Provides Customers With Broad Range of High-Speed Serial Options for Altera’s Cyclone II, Stratix II and HardCopy II Families

Indian Institute of Science will use the lab to conduct research in addition to giving students hands-on training on the application of FPGAs for advanced system designs

Solution developed by Altera and PLDA to be added to the official PCI-SIG PCI Express Integrators List