 | | 6G SERDES, Hardened Communication Engines and Ultra-High Bandwidth DSP Blocks Among Innovations for Cost and Power Sensitive Applications in Wireless, Wireline, and Video Markets |
| Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced the release of the Lattice HDR-60 Video Camera Development Kit, a production-ready High Definition (HD) video camera development system based on the LatticeECP3(tm) FPGA family. |
| Limited Quantity Promotions on IP Suites, Design Software, and PCI Express Development Kit for LatticeECP3 System Designs |
| Enables Low Power Bridging and Switching Applications with Broadcom Devices |
| Version 1.1 Provides Expanded Support, Enhanced Performance and Productivity for Low Power, Cost Sensitive Applications; Delivers an Average FMax Improvement of 20% on Larger Designs |
| Up to 30% Lower Cost, Over 100X Power Reduction Highlight New Benefits for Low-density PLD Designers |
| Programmable Devices Reduce Cost Up to 50%; Cut Weeks From Design Time; Monitor Power Supplies with 0.7% Accuracy |
| Reference Designs Accelerate Customer Time to Market for Popular Display Interfaces |
| Environment-Friendly Material Options for the ispMACH 4000ZE CPLD Family Now Available |
| Full Rate SPI-4.2 Solution Based on Low Cost, Low Power LatticeECP3 FPGA Fabric |
| ispLEVER Classic Version 1.4 Design Tools Feature Synopsys Synplify Pro and Improved ispMACH 4000ZE CPLD Fitter |
| Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that it has released more than 90 reference designs optimized for the MachXO(tm) and ispMACH(r) 4000ZE PLDs. Reference designs enable the quick and efficient design and deployment of commonly used functions such as general purpose I/O expander, I2C bus master / slave, LCD controller and SD Flash controller, as well as other interfaces, in a variety of markets including consumer, communications, computing, industrial and medical. The reference designs, coupled with complete documentation and design source code, are fully customizable and enable designers to reduce design time, boost productivity and accelerate time-to-market. |
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