Cadence and Nagoya University collaborate to port AUTOSAR-compliant TOPPERS automotive kernel to Tensilica processors and DSPs
SAN JOSE, Calif. -- Cadence Design Systems, Inc. (NASDAQ: CDNS) today announced it has collaborated with the Embedded Real-Time System Laboratory of Nagoya University to port the AUTOSAR-compliant TOPPERS ATK2-SC1 (Toyohashi OPen Platform for Embedded Real-time Systems Automotive Kernel version-2 Scalability Class 1) to Cadence® Tensilica® processors and DSPs. Nagoya University and Cadence jointly ported the ATK2-SC1 to the Tensilica processor platform, validating that it functions correctly and operates at competitive performance levels. With this port, developers working on advanced driver assistance system (ADAS), human machine interface (HMI), autonomous driving system and other automotive applications requiring the high computational capabilities of Tensilica processors can start early development of automotive applications on the TOPPERS automotive kernel. For more information about ATK2-SC1, visit https://www.toppers.jp/atk2.html.
Automotive electronic systems are increasing exponentially in complexity, making it increasingly challenging for electronic control units (ECUs) to perform their specific control functions while also connecting to the various automotive networks reliably. The AUTOSAR architecture organizes the building blocks that compose the ECU software stack, allowing multiple suppliers and OEMs to collaborate on the development of critical system components. Reuse of well-defined software components allows ECUs to be developed quickly and efficiently, and systems are becoming more heterogeneous in their deployment of processors and DSPs.
The broadly adopted and production-proven TOPPERS ATK2-SC1 real-time operating system (RTOS) automotive kernel, which manages the detailed timing of software tasks in automotive system control applications, is one of the most critical of these software building blocks. Now that Nagoya University and Cadence have ported the ATK2-SC1 to the Tensilica processor family, ECU developers can take advantage of the Tensilica DSP architectures to optimize their processors for their specific application without changing the RTOS automotive kernel. This enables them to start early development of automotive applications on the AUTOSAR OS while maintaining the high quality and dependability required for safety-critical automotive systems.
"With the growing popularity of ADAS and autonomous driving applications, automotive is becoming an increasingly promising market for the electronics industry. As a result, we are seeing growing demand for a standard platform for application development," said Hiroaki Takada, Ph.D., a professor in the Embedded Real-Time System Laboratory at Nagoya University. "Through our recent collaboration with Cadence, we were able to validate the TOPPERS automotive kernel running on Tensilica DSPs and make it available for embedded software engineers to start their early development."
"This collaboration with Nagoya University supports Cadence's automotive ADAS enablement strategy and marks the first time the AUTOSAR software layer has been ported to a Tensilica processor," said Raja Tabet, Corporate VP, Emerging Technologies at Cadence. "Many automotive applications such as radar, lidar, vision and audio/noise reduction are computationally intensive and therefore well suited to Tensilica DSPs, which are highly customizable to the specific tasks. Support for AUTOSAR via the ATK2-SC1 enables developers to take advantage of the computational benefits of Tensilica DSPs while maintaining portable, platform-independent code."
The TOPPERS ATK2-SC1 port supports all Tensilica processors and DSPs. Cadence will be demoing the ATK2-SC1 on Tensilica processors at CDNLive Japan 2017, being held July 21 in Yokohama. For more information about using Tensilica processors for automotive applications, visit https://ip.cadence.com/applications/automotive/[...].
AUTOSAR (Automotive Open System Architecture) is a worldwide collaboration to make development of ECUs more efficient by defining software architectures for many different function blocks. Learn more www.autosar.org.
Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence software, hardware and semiconductor IP are used by customers to deliver products to market faster. The company's System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine's 100 Best Companies to Work For. Learn more at cadence.com.
About Embedded Real-Time System Laboratory (ERTL), in the Graduate School of Informatics of Nagoya University
ERTL is focusing on research about implementation technology of embedded real-time systems, from either the aspect of software development or hardware design. ERTL is committed to the hardware design technology of system LSI and promotes the TOPPERS project. Learn more at ertl.jp/new/en/.
Nagoya University was established in 1871 in Japan and has nine undergraduate schools, 14 graduate schools and three research institutes including the Graduate School of Information Science with approximately 16,000 total students. Six of the 13 Japanese recipients of the Nobel Prize in the 21st century are among its faculty members.
Source: OpenSystems Media, LLC