Kilopass Delivers 'Refresh' on DRAM Technology
VLT Technology Eliminates Refresh Entirely While Delivering Lower Power, Cost and Manufacturing in Logic Compatible CMOS Processes
Kilopass Technology, Inc., the leading provider of semiconductor embedded non-volatile memory (NVM) intellectual property (IP), today unveiled its Vertical Layered Thyristor (VLT) technology for DRAM applications. VLT eliminates the need for DRAM refresh, is compatible with existing process technologies and offers significant other benefits including lower power, better area efficiency and compatibility.
“Kilopass built its reputation as the leader in one-time programmable memories,” says Charlie Cheng, Kilopass’ chief executive officer. “As the next step on our roadmap, we examined many possible devices that would not need new materials or complex process flows and found this vertical thyristor to be very compelling. We look forward to commercializing VLT DRAM in early 2018.”
Kilopass’ VLT is based on thyristor technology, a structure that is electrically equivalent to a cross-coupled pair of bipolar transistors that form a latch. The latch lends itself to memory applications since it stores values and, as opposed to current capacitor-based DRAM technology, does not require refresh. The thyristor was first invented in the 1950s and several attempts have been made to use it for the SRAM market without success. Kilopass’ VLT is the realization of DRAM requirements based on implementing the thyristor structure vertically.
Since VLT does not require complex performance- and power-consuming refresh cycles, a VLT-based DDR4 DRAM lowers standby power by 10X when compared to conventional DRAM at the same process node. Furthermore, VLT requires fewer processing steps and is designed to be built using existing processing equipment, materials and flows.
The VLT bitcell operations and silicon measurement were completed in 2015 and shown to have excellent correlation to Kilopass’ proprietary ultra-fast TCAD simulator that is one hundred thousand times faster than a traditional TCAD simulator. The TCAD simulator enables Kilopass to predict the manufacturing windows for key process parameters, and optimize the design for any given manufacturing process. A full macro level test chip was taped-out in May and initial silicon testing is underway.
The $50B DRAM market is being driven by strong demand in the server/cloud computing market as mobile phone and tablet market growth are slowing down and computing is moving increasingly to the cloud. The outlook for DRAM growth remains strong. In a report published in 2015, IC Insights forecasts DRAM CAGR of 9% over the period from 2014 – 2019. This growth rate shows DRAM growing faster than the total IC market.
Servers and server farms consume a tremendous amount of energy with memory being a major contributor. In an ideal world, the current generation of 20 nanometer (nm) DRAM would migrate to sub-20nm processes to deliver even lower power.
Unfortunately, though, current DRAM technology based on the 1 transistor, 1 capacitor (1T1C) bitcell is difficult to scale since the smaller transistors exhibit more leakage and the smaller capacitor structure has less capacitance, resulting in the need to reduce the time between refresh intervals. Up to 20% of a 16Gb DDR DRAM’s raw bandwidth will be lost due to the increased frequency of refresh cycles, a negative for multi-core/multi-thread server CPUs that must squeeze out every bit of performance to remain competitive. The DRAM industry is in a quandary trying to increase memory performance while reducing power consumption, a tough challenge given the physics at play with the current 1T1C technology. In order to address the need for lower power consumption a new DRAM technology and architecture is needed.
Kilopass’ VLT technology represents a promising solution to this problem.
Initial target markets include PCs and servers. Kilopass expects to have test silicon by early 2017 that will confirm performance of the new VLT DRAM technology and manufacturability.
The new VLT DRAM technology will be showcased at MemCon Tuesday, October 11, at the Santa Clara Convention Center in Santa Clara, Calif., in the Kilopass Booth (#100). Kilopass’ Engineering Fellow Bruce Bateman will present “A Novel Bulk Vertical-Layer Thyristor Cell for DRAM Applications” from 4:50 p.m. until 5:35 p.m. as part of the Enabling Technologies Track.
Kilopass Technology, Inc., is the leader in embedded non-volatile memory (NVM) intellectual property (IP). Its patented technologies of one-time programmable (OTP) NVM solutions have boundless capacity to scale to advanced CMOS process geometries. They are portable to every major foundry and integrated device manufacturer (IDM), and meet market demands for increased integration, higher densities, lower cost, low-power management, better reliability and improved security. Trusted by today's best-known brands, Kilopass' technology has been integrated by more than 170 customers, with 10-billion units shipped in over 400 industrial, automotive, consumer electronics, mobile, analog and mixed-signal, and internet of things (IoT) chip designs. For more information, visit www.kilopass.com or email firstname.lastname@example.org