IP
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GainSpan and GEO Semiconductor Introduce Full HD Video Application Development Kit
New ADK to be demonstrated at ISC West 2014
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Pyxalis adopts Cortus APS cores for smart CMOS image sensors
Image sensor specialist Pyxalis uses Cortus APS cores to bring intelligence to high performance image sensors
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Imagination highlights solutions for IoT and wearables at EE Live!
Featuring hands-on demonstrations of technologies and end products
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CEVA, SMIC and Brite Semiconductor Partner to Provide Hard Macro Versions of CEVA DSP Cores and Platforms
Agreement aimed at expediting customer designs utilizing CEVA DSP cores for a range of applications, including communications, connectivity, imaging, vision, audio and voice
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Cortus and Secure-IC Team up to Secure Smart Cards
Secure-IC and Cortus combine threat protection and low power processor IP cores to enable the creation of silicon efficient card designs which maximize digital trust
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Atrenta Reports 62% New Business in 2013 - Strong Momentum for Continued Growth
Atrenta today announced a record 62% new business in 2013. This new business comes from growth in existing customers and new customers' orders. Atrenta also announced that it added 47 new customers during 2013 which increased its customer count by 25%.
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STMicroelectronics Builds Wearable Technology Portfolio to Cement Market Leadership
Wave of analog and mixed-signal devices completes full collection for wearable applications
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Uniquify's CTO to Describe How to Manage Manufacturing Test During CDN Live Silicon Valley
Will Present Novel DFT Architecture for Hierarchical Scan Compression Structures
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Alizem releases its new Embedded Motor Control Software IP for Critical Applications
Alizem is proud to announce the release of its new Embedded Motor Control Software IP for Critical Applications based on a technology invented and developed at the Canadian Space Agency (CSA). This solution is meant to work with BLDC and PMSM motors operating in applications where energy-efficiency and reliability are critical.
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Evatronix Releases JPEG 2000 Image Compression Encoder Optimized for FPGA Designs
Bielsko-Biala/Poland, July 28th, 2009 - The silicon Intellectual Property (IP) provider, Evatronix SA, announced today the availability of the JPEG 2000 Encoder IP core.
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USB True emulation now available for Command and Control
Adder, a leading developer of KVM switches, extenders and KVM over IP solutions, today announced the availability of the Command & Control Switch (CCS4USB).
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Satin IP Technologies, Toppan Photomasks and XYALIS Partner to Improve Design for Mask Manufacturing
Companies collaborate collaborated within the Crystal partnership program to significantly improve design for mask manufacturing by breaking the barriers that have traditionally separated IC designers from mask shop engineers
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Satin IP Technologies Helps STMicroelectronics Achieve IP Design Quality Closure
Companies to jointly present at DAC 2009 on enabling IP quality closure to monitor and improve the quality of their internally developed semiconductor intellectual property (IP) blocks
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Adder Announces Real Time DVI over IP and USB Extender
Adder to Give Sneak Peek of Major Industry Breakthrough at InfoComm
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At Date 2009, D&R announced a new turnkey web infrastructure that will assist IP Providers marketing, delivering and supporting their IPs
As an IP business catalyst company D&R offers to IP providers an advanced turnkey Web solution based on a decade of research for publishing, marketing, packaging and delivering their IPs or products to the market.
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IPextreme CEO Warren Savage on Panel Discussing How to Achieve Maximum Value from IP Assets
Key industry leaders and visionaries will discuss the IP challenges facing innovative teams across engineering, R&D, supply-chain and legal departments on a daily basis, outlining different methods for reducing risk in R&D project selection and for building IP portfolios that generate higher profits and licensing revenues, protect business unit profits from competition, and contain costs.
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DT8051 - World's smallest and fastest 8051 core
Digital Core Design (DCD) today releases World's smallest and fastest 8051 core. The 7150 ASIC gates for complete system including 8051-CPU, full duplex UART, Timers 0&1, Advanced Power Management Unit, eight I/O lines, eight external interrupts INT0-INT7 and 2-wire DoCD on-chip debugger is the best achievement on the IP Market. DT8051 runs Dhrystone 2.1 benchmark program 8.1 times faster than the original 80C51 at the same frequency.
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DP8051 - 5th generation of world's fastest and most popular 8051 IP Core
Digital Core Design (DCD) today releases the 5th generation of World's fastest and most popular 8051 core. DP8051 runs Dhrystone 2.1 benchmark program 11.45 to 14.74 times faster than the original 80C51 at the same frequency.
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Virage Logic Selected as IBM's PowerPC Partner
Customers Benefit With Convenience of Single Source for IBM's PowerPC and Virage Logic's Semiconductor IP
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IBM Selects Virage Logic as Its PowerPC Partner
Customers Benefit With Convenience of Single Source for IBM's PowerPC and Virage Logic's Semiconductor IP
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ON Semiconductor to Offer New Intellectual Property Blocks for Industry-Standard Interfaces, Microcontrollers and Peripherals
More than 30 additional silicon-proven Intellectual Property blocks will be available for ON Semiconductor's complete portfolio of digital and mixed-signal ASIC technologies
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ViXS Systems Selects Virage Logic's High-Performance Intelli(tm) DDR 2/3 Memory Interface IP Solution for Video Processing Systems
Supporting Speeds of Up to 1.6 Gb/s Makes Intelli DDR2/3 Solution Ideal for ViXS' High-End Video and Networking Product Portfolio
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Evatronix Releases High Resolution Display Controller IP Core.
The controller enables straightforward video/image streaming through DisplayPort, HDMI, DVI and VGA interfaces.
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Fastest 8051 IP core from Evatronix wins eg3 "Tech Choice" award
R8051XC2, with the fastest average instruction execution in the 8051 market, has won the "Tech Choice" award from eg3.com.
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Fastest 8051 IP core downloadable demo from Evatronix
R8051XC2, the world's fastest 8051 IP core, is available for free download.
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XMC and Conduction-Cooled PMC …quot; New Mezzanine Cards Based on FPGA
MEN Mikro Elektronik is coming up with another two mezzanine cards with FPGA functionality. The two FPGA based modules introduced one year ago – the P599 PMC and M199 M-Module™ – are now getting company by a conduction-cooled PMC, P598, and an XMC module, P699. The USM™ Universal Submodule concept that this I/O family is built on implements the desired functionality as IP cores inside the FPGA of the mezzanine card, while the line drivers are located on a submodule.
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XMC and Conduction-Cooled PMC …quot; New Mezzanine Cards Based on FPGA
Right on time for Embedded World 2008 in Nuremberg MEN Mikro Elektronik is coming up with another two mezzanine cards with FPGA functionality. The two FPGA based modules introduced one year ago – the P599 PMC and M199 M-Module™ – are now getting company by a conduction-cooled PMC, P598, and an XMC module, P699. The USM™ Universal Submodule concept that this I/O family is built on implements the desired functionality as IP cores inside the FPGA of the mezzanine card, while the line drivers are located on a submodule.
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Lattice Partners with Oregano, Introduces IEEE 1588 Industrial Ethernet IP Core
IP Core Supports IEEE 1588 Clock Synchronization and Can Be Delivered as an IP Core or ASSP
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CoWare Adds MIPS32 34K Processor Support Package to SystemC-based Model Library
Expansion of CoWare Model Library Enables Development of Optimal Architectures for MIPS32 34K-based Systems. Integration of the new processor model into CoWare's ConvergenSC SystemC-based environment for platform-driven ESL design enables users and prospective users of the MIPS32 34K cores to assess and optimize their capabilities on system performance, at an early stage of design. Designers can readily combine the MIPS32 34K model with other elements of the CoWare Model Library, such as AMBA or OCP-IP-compliant on-chip interconnects, and peripheral models, to create a SystemC transaction-level model of the complete platform, months ahead of the availability of a hardware prototype. Designers can also run real software on the platform model and simulate at speeds fast enough to analyze overall system performance and assess the impact of the 34K cores' innovative capabilities such as Multi-threading (MT) and DSP functions.