Sundance Multiprocessor Technology Ltd.

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A CompactPCI FPGA board with five Altera APEX-600E FPGAs, ZBT SRAM, and Sundance Digital Bus (SDB) backplane on J3


  • ?128-point to 1 million-point FFT engine radar sonar
  • ?16-bit complex input data format
  • ?32-bit blocked floating-point output data format, extendable to 64 bits
  • ?Up to 100 MSps data input rate
  • ?12.5-MHz throughput in windowed mode
  • ?2D 512 x 512 real FFT in 4ms
  • ?1k complex FFT in 15?s
  • ?flexible data flow architecture
  • ?Four 140 MBps SDB interface ports
  • ?Two front-panel, 70 MBps Sundance Datapipe links
  • Over 120 MB RAM and 8.5M FPGA gates

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