PCIe Gen 3 IP for ASIC, FPGA & SoC

PLDA

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PLDA offers the most complete IP solutions for the PCIe interface with products designed to speed your time-to-design for ASIC, FPGA and SoC products.
PCIe Gen 3 IP for ASIC, FPGA & SoC
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FEATURES

  • XpressRICH3 PCIe 3.0 IP for ASIC: A highly configurable PCIe endpoint, root port, and switch semiconductor IP with support for PCIe 3.0 at Gen3, Gen2, Gen1 speeds, in x1, x2, x4, x8, x16.
  • XpressRICH3-AXI PCIe 3.0 IP with AXI for ASIC: A configurable PCIe Gen3 IP solution featuring an AXI3/AXI4 compliant user interface with built-in DMA.
  • QuickPCIe ? PCIe with Enhanced DMA for FPGA: A flexible PCIe 3.0 interface IP with advanced DMA that exposes an AMBA AXI4 interface to the user. Targeted to Altera or Xilinx FPGAs.
  • PCIe Gen 3 Prototyping Design Kits: PLDA XpressGX5LP and XpressV7LP FPGA design kits feature a highly-integrated, low-profile PCI Express FPGA card with quad-10Gb Ethernet (40GbE) engineered for prototyping and field deployment.

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