• Streamlines and simplifies the porting of applications to multiple DSP and FPGA processors
• Its block diagram programming language specifies only the functionality of the graph, without regard to the target system
• Gedae uses its knowledge of the target (processor layout, transfer methods, and optimized routines) to compile the block diagram into an efficient implementation of the application on the target processors
• Detailed timing and visualization displays create an extensive debugging and analysis capability

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• GEDAE products
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