Raytheon Company

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Computer architecture that can adopt different forms depending on the application


  • Dubbed MONARCH (Morphable Networked MicroArchitecture) and developed to address the large data volume of sensor systems and their signal and data processing throughput requirements
  • Performs as a single system-on-chip and performs in an array of chips for teraflop throughput
  • Significantly reduce the amount of hardware (and therefore power) required for computing systems while still achieving extremely high (teraflop) throughput
  • Because of the memory integrated on the chip, very small systems may be implemented with a single deviceAbility to ?morph? devices so they can perform downstream tasks instead of sitting idle while waiting for fresh input further reduces hardware demand
  • Six microprocessors and a highly interconnected reconfigurable computing array
  • Provides 64 GFLOPS with more than 60 GBps of memory bandwidth and more than 43 GBps of off-chip data bandwidth
  • Each device has input/output ports to enable seamless data movement among multiple chips
  • Two off-chip memory interfaces for large problems
  • Every chip is equipped with two RapidIO interfaces for connecting to industry-standard equipment

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