Spartan-II XC2S100


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  • An FPGA with 100,000 system gates
  • Programmable support for multiple I/O standards
  • On-chip block RAM
  • Digital delay lock loops for both chip-level and board-level clock management
  • Replaces complex ASSP functions such as a MIPS-PCI bridge, Viterbi-Reed Solomon decoders, and quad data rate RAM memory controllers
  • Operates at 2.4 V
  • Produced on a 0.18 micron, six-layer metal process

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