XC1800

XILINX, Inc.

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In-system programmable serial/parallel-load Flash CPLD/FPGA configuration PROMS which can be used for the logic initialization of any SRAM-based CPLDs

FEATURES

  • 128 Kbits to 4 Mbits of configuration memory
  • Programmed with IEEE 1149.1 boundary scan JTAG circuitry
  • I/O pins accept 5V, 3.3V, and 2.5V signals while driving 3.3V or 2.5V output signals
  • Available packages include 20-pin PLCC to 44-pin VQFP

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