Embedded Computing Design

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Embedded Computing Design

XJ chain debugger

XJTAG — November 2008

XJ  chain debugger

XJTAG's new chain debugger abstracts engineers from the complexity of the JTAG standard and significantly improves set-up time and fault diagnostics on BGA-populated PCBs

  • Allows engineers to quickly verify the integrity of the JTAG chain
  • Instantaneous diagnosis of the specific location of an error in the JTAG chain, such as a short or open circuit, poor joint ,or incorrect connection
  • XJTAG's chain debugger improves diagnostic output and has an option to print out the complete contents of the scan chain in the event of a problem, including binary and hex versions of the results
  • The feature-rich chain debugger is a significant enhancement to the XJTAG boundary scan development system and will speed up the development process

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