• The base Xtensa LX3 DPU configuration can reach speeds of over 1 GHz in 45nm process technology (45GS) with an area of just 0.044 mm2 and power of 0.015 mW/MHz
• Broadest choice of DSP options including 32-bit IEEE-754 compliant single-precision floating point unit & 64-bit IEEE-754 compliant double precision floating point accelerator
• Optional HiFi 2 Audio DSP, ConnX D2 16-bit DSP, and Vectra VLIW DSP engine
• Automated new instruction insertion for fool-proof customizations - write your own or just submit C code for analysis
• Multicore design support with modeling and high-performance simulations
• Natural connectivity to RTL blocks using direct GPIO and Queue interfaces

See also:

• Xtensa LX3 Datasheet
• Tensilica products
• Restart Search

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