Synplify Premier

Synopsys, Inc.

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The Synopsys FPGA design solution comprises high-quality, high-performance, and easy-to-use FPGA implementation and debug tools
Synplify Premier


  • Designers using the Synopsys FPGA design tools gain fast time-to-results for complex FPGAs, area optimization for cost and power reduction, multi-FPGA vendor support, and incremental and team-design capabilities for faster FPGA design development
  • The Synopsys FPGA design tools also provide additional value by offering DesignWare IP integration, links to high-performance functional verification with VCS, integration with Synphony Model Compiler, and an ASIC compatible synthesis flow for FPGA-based prototyping
  • As part of the Synopsys FPGA Design Solution, Synplify Premier software performs FPGA synthesis for programmable devices sold by Actel, Achronix, Altera, Lattice Semiconductor, Silicon Blue and Xilinx
  • Synplify Premier software is used by customers designing low-power, high-performance, and high-capacity FPGA-based production systems and high-reliability designs
  • The tool is also employed by customers prototyping ASICs, ASSPs and SoCs using FPGAs, including those using Synopsys HAPS FPGA-based prototyping systems
  • Fast synthesis mode synthesizes even the largest design in a fraction of the time required by other tools DesignWare support enables easy ASIC code migration into an FPGA for prototyping Automatic gated clock and generated clock conversion for easier ??implementation of the ASIC design in an FPGA
  • Comprehensive HDL language support including Verilog, VHDL,SystemVerilog, VHDL2008 and mixed-language designs
  • Infer DSP functions from RTL and map into vendor's DSP hardware (e.g. MACs, DSP 48) for improved QoR

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