Embedded Computing Design

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Embedded Computing Design

TIC-FEP-VPX3b

Elma Electronic Systems — September 2011

TIC-FEP-VPX3b

FMC site coupled to a large-capacity Virtex-6 FPGA for extremely flexible I/O

  • Four 4-lane fabric ports on the P1 connected by GTX transceivers to the main FPGA
  • Four fat pipe channels provide PCIe x4 and GbE interfaces as well as two x4 expansion ports
  • GTX transceivers can be grouped to form multi-lane Aurora pipes supporting inter-VPX card connection, allowing the FPGA processor boards to be very tightly coupled via point-to-point or mesh topology
  • Board fits scalable architectures

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