Over the years, the semiconductor industry has been using C/C++ high-level synthesis (HLS) tools as one way to address these complexity problems. However, multiple challenges have limited the adoption and scalability of these tools. This paper will discuss some of these challenges and introduce Synphony C Compiler (SCC), a new high-level synthesis product from Synopsys that includes some unique and effective technologies that address the challenges in high-level synthesis adoption. These include:
· Higher abstraction for design and verification using C/C++
· Advanced hierarchical optimizations to synthesize efficient implementation architectures
· Automatic SystemC model generation for analysis and verification
· Earlier and more comprehensive power, performance, and area tradeoff exploration
· Integrated verification flows for system modeling and HW prototyping