Tanner EDA’s new tool forgoes full automation in favor of accelerating the layout process by generating key analog design primitives, such as current mirrors and differential pairs. Layout engineers maintain complete freedom to manually place and route these structures as well as being able to tune the output to their specific requirements. Surpassing traditional automation methodologies, this new layout approach dramatically improves layout productivity and reduces design cycle times while generating structures at a level of quality that consistently matches that of the most experienced layout engineers
Accelerating Analog IC Design using High Performance Device Generation
New approach to accelerating analog layout surpasses full custom and traditional automation methodologies
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Tanner EDA’s new tool forgoes full automation in favor of accelerating the layout process by generating key analog design primitives, such as current mirrors and differential pairs. Layout engineers maintain complete freedom to manually place and route these structures as well as being able to tune the output to their specific requirements. Surpassing traditional automation methodologies, this new layout approach dramatically improves layout productivity and reduces design cycle times while generating structures at a level of quality that consistently matches that of the most experienced layout engineers


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