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Embedded Computing Design

Lowering Power at 28 nm with Xilinx 7 Series FPGAs

Jameel Hussein, Xilinx, Inc., Matt Klein, Xilinx, INc., and Michael Hart, Xilinx, Inc. — February 9, 2012

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1Power consumption in has become a primary factor for selection.


Whether the concern is absolute power consumption, usable performance, battery life, thermal challenges, or reliability, power consumption is at the center of it all. Xilinx has been focused on reducing power consumption for many years, starting with development of Virtex®-4 FPGAs, in which significant static power reduction was achieved by the use of triple oxide. In addition, the Virtex-4 devices offered customers a way to the effects of temperature on static power in FPGAs (see WP221, Static Power and the Importance of Realistic Junction Temperature Analysis). Xilinx has continued to study and implement many different power reduction strategies, which span process changes and improvements, architecture changes, voltage scalable products, and software power optimization strategies.

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