RISC needs to make a comeback
Paraphrasing Henry Thoreau, which isn’t something you typically see in an embedded blog,
“Simplicity, simplicity, simplicity! I say, let your instruction set be as two or three, and not a hundred or a thousand; instead of a million, count half a dozen, and keep your circuitry on your thumb nail. The CPU must be a great calculator indeed that succeeds. Simplify, simplify. Instead of three instructions per cycle, if it be necessary execute but one; instead of a hundred registers, five; and reduce data structures in proportion.”
In the early 80s I fell in love – with reduced instruction set computing, aka RISC.” (If my wife chances upon this article, don’t worry honey. I fell in love again, with you, only a few years later.) In fact, I used to tell people that I invented RISC. When I was in college at Cornell in the 1970s, we had a senior year project to build a processor out of discrete ICs. Most of these projects over the years were never completed because it was a pretty big task. I was determined to create a working processor. I was the design’s architect and decided to simplify the design as much as possible while still meeting the design criteria. For example, there were rotate left and rotate right instructions, but I realized that only one rotate was needed to perform either function, so I left out the circuitry for one of these instructions. I also ended up designing the logic for much of the processor and had to rewrite the test code, but that’s for another blog.
When I found the Ph.D. thesis of Manolis Katevenis at UC Berkeley, I immediately saw the brilliance in the simplicity of RISC. The concept was to reduce the hardware‘s complexity, creating a circuit that could be more easily designed, simulated, and tested, and that used less power than complex processor designs. This RISC processor would run at a faster clock speed because it required less hardware, and thus shorter delay paths, than traditional processors. The built-in instructions would support 90 percent of all applications in the field. Other applications, like as graphic manipulation, would require multiple instructions, each running very quickly, rather than a single instruction requiring multiple clock cycles and essentially slowing down the 90 percent of applications that didn’t use advanced graphics.
Another great aspect of RISC was that the software could be smart enough to handle complexity. Complex instructions could be supported in software by compilers that translated complex instructions into a series of simple instructions, all of this invisible to the programmer. The elegance and beauty of this simplicity was hard not to love.
RISC started in academia but eventually moved into industry. Marketing professionals eventually decided, “Wouldn’t it be great to have a RISC processor with added graphics instructions?” So the major processor companies began creating RISC processors with cool new complex instructions that looked good in data sheets and advertisements. These “RISC+” processors brought back the complex, power-hungry, slower, complex instruction set computers (CISC), and the term “RISC” is now a meaningless buzzword.
As the Internet of Things is gaining traction, it’s time to bring back real RISC (as opposed to marketing RISC). As processors are being designed into toasters, thermostats, and light bulbs, the processors need to be low power and low cost. While some consumers may be willing to pay $50 for an iBulb from Apple, that’s too high a price point for most. Along these same lines, it doesn’t make sense for consumer product companies to hire experienced, specialized programmers to put a processor into a light bulb. Instead, IoT software development tools need to be sophisticated enough to allow programmers to write simple applications and have the software tools create the complexity of a multitasking system and real-time operating system (RTOS). RISC will return out of necessity. Zeidman Technologies is already working on the tools. Which processor company will work on the hardware?
Bob Zeidman is the president and founder of Zeidman Technologies where he invented the patented SynthOS program for automatically generating an application specific operating system (ASOS). Bob is the recipient of the 2010 and 2015 Outstanding Engineer in a Specialized Field from the IEEE Santa Clara Valley Section. SynthOS can be used online for free at www.SynthOSonline.com.