IP-EP200

Acromag, Inc.

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IP-EP200

FEATURES

  • An industry pack digital I/O module
  • Implements a user-configurable Altera Cyclone II EP2C20 FPGA
  • Four models available: IP-EP201: 48 TTL I/O lines; IP-EP202: 24 differential RS485 I/O lines; IP-EP203: 24 TTL and 12 RS-485 I/O lines; IP-EP204: 24 LVDS I/O lines
  • FPGA programmable via JTAG port or IP bus
  • Local static RAM (64K x 16) under FPGA control
  • LVTTL external clock connected directly to the FPGA
  • Supports 8 MHz and 32 MHz IP bus
  • Programmable PLL-based clock synthesizer
  • Example FPGA design code provided as VHDL ? 8 MHz IP bus interface; digital I/O control register
  • Hardware support for DMA and memory space

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